Digital clock signals are part of the fundamental infrastructure of an integrated circuit, for example, to coordinate logic state transitions in a synchronous digital circuit. A digital clock signal may be generated by a clock generator such as a ring oscillator or an injection-locked clock oscillator, for example. However, a free-running ring oscillator or an injection-locked clock oscillator may have undesired frequency drift due to process, voltage and temperature (PVT) variations in the integrated circuit. Thus, improved clock generation using an injection-locked clock oscillator which minimizes clock frequency drift is desired.